PIC18F4539-E/PT【PDF 44/322 页】IC PIC MCU FLASH 12KX16 44TQFP

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PIC18FXX39

DS30485A-page 136

Preliminary

2002 Microchip Technology Inc.

REGISTER 16-4:

SSPCON1: MSSP CONTROL REGISTER 1 (I2C MODE)

R/W-0

WCOL

SSPOV

SSPEN

CKP

SSPM3

SSPM2

SSPM1

SSPM0

bit 7

bit 0

bit 7

WCOL: Write Collision Detect bit

In Master Transmit mode:

= A write to the SSPBUF register was attempted while the I2C conditions were not valid for

a transmission to be started (must be cleared in software)

= No collision

In Slave Transmit mode:

= The SSPBUF register is written while it is still transmitting the previous word (must be

cleared in software)

= No collision

In Receive mode (Master or Slave modes):

This is a “don’t care” bit

bit 6

SSPOV: Receive Overflow Indicator bit

In Receive mode:

= A byte is received while the SSPBUF register is still holding the previous byte (must

be cleared in software)

= No overflow

In Transmit mode:

This is a “don’t care” bit in Transmit mode

bit 5

SSPEN: Synchronous Serial Port Enable bit

= Enables the serial port and configures the SDA and SCL pins as the serial port pins

= Disables serial port and configures these pins as I/O port pins

Note:

When enabled, the SDA and SCL pins must be properly configured as input or output.

bit 4

CKP: SCK Release Control bit

In Slave mode:

= Release clock

= Holds clock low (clock stretch), used to ensure data setup time

In Master mode:

Unused in this mode

bit 3-0

SSPM3:SSPM0: Synchronous Serial Port Mode Select bits

1111

= I2C Slave mode, 10-bit address with START and STOP bit interrupts enabled

1110

= I2C Slave mode, 7-bit address with START and STOP bit interrupts enabled

1011

= I2C Firmware Controlled Master mode (Slave IDLE)

1000

= I2C Master mode, clock = FOSC / (4 * (SSPADD+1))

0111

= I2C Slave mode, 10-bit address

0110

= I2C Slave mode, 7-bit address

Note:

Bit combinations not specifically listed here are either reserved, or implemented in

SPI mode only.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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